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1 |
Active Electromagnetic Side-Channel Analysis: Crossing Physical Security Boundaries through Impedance Variations Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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2 |
Coil-Based Detection and Concurrent Error Correction Against EMFI Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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3 |
Combined Stability: Protecting against Combined Attacks Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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4 |
Don’t be mean: Reducing Approximation Noise in TFHE through Mean Compensation Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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5 |
FAST: Fast and Accurate Security Testing of HRP UWB Chips Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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6 |
Fault Attacks on VOLEitH Signature Schemes Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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7 |
High Fidelity Security Mesh Monitoring using Low-Cost, Embedded Time Domain Reflectometry Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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8 |
Keep it Simple: Refreshing the NTT of Kyber’s Decapsulation to Prevent Plaintext-Checking Side-Channel Attacks Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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9 |
ML-DSA masking sweetened with SUCRE: Shuffle-and-Unmask Countermeasure for REjection sampling Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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10 |
NeonCROSS: Vectorized Implementation of Post-Quantum Signature CROSS on Cortex-A72 and Apple M3 Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2026, 2026, Nr. 1
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