|
171 |
Multidimensional Linear Cryptanalysis of AEGIS
Enthalten in IACR transactions on symmetric cryptology Bd. 2025, 2025, Nr. 3
|
|
|
|
172 |
On the Average Random Probing Model
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
|
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|
|
173 |
On the Characterization of Phase Noise for the Robust and Resilient PLL-TRNG Design
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
|
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174 |
POTA: A Pipelined Oblivious Transfer Acceleration Architecture for Secure Multi-Party Computation
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
|
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175 |
Practical Opcode-based Fault Attack on AES-NI
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
|
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176 |
Primitive-Level vs. Implementation-Level DPA Security: a Certified Case Study
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
|
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177 |
Secure and efficient transciphering for FHE-based MPC
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
|
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178 |
Tailorable codes for lattice-based KEMs with applications to compact ML-KEM instantiations
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
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179 |
The Large Block Cipher Vistrutah
Enthalten in IACR transactions on symmetric cryptology Bd. 2025, 2025, Nr. 3
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180 |
TREE: Bridging the gap between reconfigurable computing and secure execution
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
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Administration
