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	91	HCTR+: An Optimally Secure TBC-Based Accordion Mode Enthalten in IACR transactions on symmetric cryptology Bd. 2025, 2025, Nr. 3
	92	HIPR: Hardware IP Protection through Low-Overhead Fine-Grain Redaction Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
	93	KeyVisor – A Lightweight ISA Extension for Protected Key Handles with CPU-enforced Usage Policies Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
	94	LEAP: High-Performance Lattice-Based Pseudorandom Number Generator Enthalten in IACR transactions on symmetric cryptology Bd. 2025, 2025, Nr. 3
	95	Minimized PRFs from Public Permutations Enthalten in IACR transactions on symmetric cryptology Bd. 2025, 2025, Nr. 3
	96	Multidimensional Linear Cryptanalysis of AEGIS Enthalten in IACR transactions on symmetric cryptology Bd. 2025, 2025, Nr. 3
	97	On the Average Random Probing Model Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
	98	On the Characterization of Phase Noise for the Robust and Resilient PLL-TRNG Design Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
	99	POTA: A Pipelined Oblivious Transfer Acceleration Architecture for Secure Multi-Party Computation Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
	100	Practical Opcode-based Fault Attack on AES-NI Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3

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