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191 |
Tailorable codes for lattice-based KEMs with applications to compact ML-KEM instantiations
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
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192 |
The Large Block Cipher Vistrutah
Enthalten in IACR transactions on symmetric cryptology Bd. 2025, 2025, Nr. 3
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193 |
TREE: Bridging the gap between reconfigurable computing and secure execution
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 3
|
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194 |
A Code-Based ISE to Protect Boolean Masking in Software
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 2
|
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195 |
AETHER: An Ultra-High Throughput and Low Energy Authenticated Encryption Scheme
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 2
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196 |
Higher-Order Time Sharing Masking
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 2
|
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197 |
Improving MPCitH with Preprocessing: Mask Is All You Need
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 2
|
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198 |
Information Theoretic Analysis of PUF-Based Tamper Protection
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 2
|
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199 |
Leaky McEliece: Secret Key Recovery From Highly Erroneous Side-Channel Information
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 2
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200 |
MulLeak: Exploiting Multiply Instruction Leakage to Attack the Stack-optimized Kyber Implementation on Cortex-M4
Enthalten in IACR transactions on cryptographic hardware and embedded systems Bd. 2025, 2025, Nr. 2
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Administration
